In this experiment, a circuit is designed to power 3 loads using an unregulated power supply and voltage divider at a given acceptable range of voltage for the loads.
Each load will be represent by a resistor (R1, R2, R3).
All 3 loads can be combined into a single resistar with equivilant resistance.
Things that we are trying to solve for this lab given that the load resistance (R1= R2= R3 = 1k ohm) and the Vbus must remain between 5.75V and 6.25V:
- Calculated for Vs and Rs, and construct the designed circuit including calculated data.
- Record the maximum and the minimum BUS current.
- Record the normal resistance and the actual resistance in the resistors and the resistance box.
- Measure and adjust the voltage in the unregulated power supply to 6V; check that the max current and power in within tolerance range of the power supply and resistor box.
- Collect any data for the circuit with different numbers of load connected, and determine the power dilivered by the loads(s).
- Complete the post lab analysis.
Vmax happens when Req is at max, and vice versa. Req is max when only 1 load is turned on, and at min when all 3 loads are turned on.
By solving the system of equations, we calculated Vs to be 6.53V and Rs is 45.5ohm
Max BUS current = 6.25mA;
Min BUS currernt = 17.24mA.
All resistance values and the voltage of the power supply calculated on above picktures will be used in the circuit.
A schematic drawing of the circuit on paper.
The overall view of the circuit with DMM measuring the instantanous voltage, and resistance box connected in series with breadboard and power supply.
A closer view to the breadboard with each resistor being a load in this lab.
Using another DMM as ammeter to measure the total currernt to the loads from the power supply.
All the measurements for the parameter of the circuit, as well as the calculated Power by the loads.
Power calculation for 2 loads: P = VI = (10.97 mA)*(5.08 V) = 55.7 mW
Load
|
Voltage (V)
|
Variation (%)
|
1 Load
|
5.48
|
-8.67
|
2 Load
|
5.08
|
-15.33
|
3 Load
|
4.55
|
-24.17
|
The voltage across the parallel loads are shown in the above table.
Clearly, the voltage across the parallel load is dropping as more loads are added into the circuit. This is the result of using an unregulated power supply as it does not maintain a constant voltage output. The unregulated power supply is the main cause for the enlarging variation in the supplied voltage.
V_Bus,min = R_eq*V_s/(R_s + R_eq).
New R_eq = 1/4 kΩ.
V_s = 6.53 V,
R_s = 45.5 Ω
V_Bus,min = 5.52 V
The new variation using V_s = 6V would be -7.92 %.
Variation by 1% ==> 5.94 V < V_s < 6.06 V
V_s = 6.12 V
R_s = 10.2 Ω
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